1. Field of the Invention
This invention relates to an information storage/reproducing apparatus which has a data comparison function to confirm that stored information has been correctly stored.
2. Description of the Related Art
FIG. 9 is a block diagarm showing the schematic configuration of a conventional information storage/reproducing apparatus.
In FIG. 9, an information storage/reproducing apparatus 42 is connected to a host computer 40 through an interface 41, and is controlled by the host computer 40.
The information storage/reproducing apparatus 42 comprises an interface unit 43 for connecting with the host computer 40, a buffer RAM (random access memory) 44 for temporarily holding data to be stored on a storage medium and data reproduced from the storage medium, and error correction circuit (hereinafter termed an ECC) 45 for correcting data.
The information storage/reproducing apparatus 42 further comprises a microprocessor (hereinafter termed a CPU) for controlling the entire apparatus, a ROM (read-only memory) 47 for holding programs for controlling the CPU 46, a work RAM 48 used during data processing by the CPU 46, a DMA (direct memory access) controller (hereinafter termed a DMAC) 49 for performing DMA transfer, a disk controller (hereinafter termed an ODC) 4A for handling stored data and reproduced data, and a MODEM (modulator-demodulator) 4B for performing modulation from data words to channel words, and demodulation from channel words to data words.
In addition, the information storage/reproducing apparatus 42 comprises a laser-diode driver (hereinafter termed an LDD) 4C which operates in accordance with a modulated output from the MODEM 4B, a laser-diode (hereinafter termed an LD) 4D driven by the LDD 4C, a photodetector (hereinafter termed a PD) 4E for detecting reflected light from a disk, a reproducing amplifier 4F for amplifying a reproduced signal from the photodetector PD 4E, a binary coding circuit 4G for digitizing the reproduced analog signal from the reproducing amplifier 4F, a PLL (phase-locked loop) circuit 4H for generating a reproducing clock signal from an output from the binary coding circuit 4G, a discriminator 4I for sampling the output from the binary coding circuit 4G with a clock signal from the PLL circuit 4H to provide channel words, and information storage medium (a magnetooptical disk in the present embodiment) 4J for storing information.
Data storage and reproducing processing will now be explained with reference to FIG. 9.
First, in storing data, the CPU 46 of the information storage/reproducing apparatus 42 prepares for the storage of data in response to a command from the host computer 40.
The host computer 40 transfers data to be stored to the information storage/reproducing apparatus 42 through the interface 41.
In accordance with control by the CPU 46, the information storage/reproducing apparatus 42 receives the above-described data through the host computer interface unit 43, and transfers the received data to the buffer RAM 44, where the data is held. Subsequently, when preparation for storage, such as searching for the information storage medium 4J, for example, has been completed in accordance with commands from the CPU 46, the CPU 46 commands the ODC 4A to transfer the data. In accordance with this command, the data to be stored is transferred from the buffer RAM 44 to the MODEM 4B via the ODC 4A.
The ECC 45 generates an error correcting code in synchronization with the transfer of the data to be stored. The ODC 4A transfers the error correcting code generated by the ECC 45 to the MODEM 4B in addition to the data to be stored.
The MODEM 4B modulates the data, and transmits the modulated data to the LDD 4C in the form of channel words. The LDD 4C drives the LD 4D of an optical head to store the data on the information storage medium 4J.
Next, an explanation will be provided for the data reproducing processing. As in storage processing, the host computer 40 and the CPU 46 of the information storage/reproducing apparatus 42 prepare for reproducing processing of data by exchanging commands.
The CPU 46 makes the optical head seek the position of data to be reproduced on the disk, and notifies the ODC 4A of a target sector.
After the completion of seek, a signal read from the information storage medium 4J by the PD 4E of the optical head is input to the reproducing amplifier 4F, where the signal is amplified. An output from the reproducing amplifier 4F is converted from an analog signal into a digital signal by the binary coding circuit 4G, and the converted digital signal is input to the discriminator 4I and the PLL circuit 4H.
The PLL circuit 4H generates a reproducing clock signal in accordance with the input signal, and transmits a clock signal to the discriminator 4I. The discriminator 4I samples the signal from the binary coding circuit 4G based on the clock signal from the PLL circuit 4H, and inputs the sampled signal to the MODEM 4B, where the reproduced signal is demolulated to become data words, which are transferred to the buffer RAM 44 and the ECC 45 by the ODC 4A.
The error correcting code is not transferred to the buffer RAM 44. If an error is present in the data, the ECC 45 corrects wrong data in the buffer RAM 44. The CPU 46 outputs the data within the buffer RAM 44 to the interface 41 and the host computer 40 reads the data.
FIG. 10 is a block diagram illustrating the concept of comparison in the above-described conventional apparatus.
In FIG. 10, areas 440 and 441 are storage areas obtained by dividing the buffer RAM 44 into two areas.
First path 401 is a path from the host computer interface unit 43 to the first storage area 440 of the buffer RAM 44. Second path 402 is a path from the MODEM 4B to the second storage area 441 of the buffer RAM 44 via the ODC Third path 403 is a path from the first storage area 440 of the buffer RAM 44 to the ODC 4A. Fourth path 404 is a path from the second storage area 441 of the buffer RAM 44 to the ODC 4A. Fifth path 405 is a path from the ODC 4A to the CPU 46.
Data comparison means 5 is provided within the ODC 4A.
FIG. 11 is a flowchart showing a comparison operation in the conventional apparatus.
In this flowchart, when a comparison operation has been started (S70) after data storage of one unit, host computer data are first input from the host computer interface unit 43 to the first storage area 440 of the buffer RAM 44 through the first path 401 (S71), the host computer data having been input from the host computer 40 to the information storage/reproducing apparatus 42 through the interface 41, as described above.
Next, data read from the disk are input from the MODEM 4B to the second storage area 441 of the buffer RAM 44 through the second path 402 (S72).
Steps S71 and S72 may be reversed in some cases.
When data have been stored in the entire respective areas, or a necessary amount of data have been stored, the process proceeds to the next processing step.
That is, first, data of a unit (usually one byte or a few bytes) from the host computer interface 41 are input from the first storage area 440 of the buffer RAM 44 to the comparison means 5 within the ODC 4B through the third path 403 (S73). Next, host computer data of one unit (having an amount equal to the amount of the above-described data handled through the third path 403) are input from the second storage area 441 of the buffer RAM 44 to the comparison means 5 within the ODC 4B through the fourth path 404 (S74).
The comparison means 5 compares data for every unit (S75). If the two data do not coincide as a result of the comparison, the CPU 46 is notified of the fact by means of interrupt processing through the fifth path 405 (S76).
Such comparison is executed for a predetermined amount of data (S77). After the completion of comparison, the process proceeds to the next processing step (S78).
In the above-described conventional processing, however, since respective data to be compared must first be stored in the buffer RAM 44 before performing data comparison, much time is needed for comparison.
Furthermore, the maximum number of data which can be compared at a time is about half the capacity of the buffer RAM, and hence efficiency is low.
Such problems reduce the efficiency of a job in the usual apparatus, and greatly influence the cost of an information storage medium considering that such information storage/reproducing apparatus may also be used for quality inspection during production of information storage media and thus the time required for production is increased.